Analysis of Network on Chip Based on Longtium SoC

Nowadays, one chip can integrates up to 4 billion transistors. Therefore, how to deal with the connection between its different components efficiently becomes critical. Network on chip is a promising technology to handle with the connection problems. In this paper, a NoC traffic model is extracted based on the longtium multi-processor SoC platform at first. Then we simulatethe 4 different topologies (mesh, ring, ring_extend and fat-tree) using the traffic model. It is analyzed that the static routing fat-tree architecture is suitable for the Longtium SoC. The Longtium SoC is implemented on the Xilinx Virtex II xc2v8000 FPGA and itpsilas NoC is evaluated. We found that the increased time spending on solving collision in the NoC with wormhole switching protocol is very little. Wormhole is much more fit for NoC than story-and-forward protocol. The package width is critical to the performance for NoC with wormhole switching protocol. How to decrease the hardware cost of wormhole protocol router is still the critical problem in design.