A spread-spectrum clock generator with dual-voltage controlled oscillator

This paper proposes a spread spectrum clock generator (SSCG) for EMI reduction. The SSCG circuit utilizes a dual-voltage controlled oscillator based on the regular integer-N PLL. The circuit has been simulated in 0.18 mum CMOS technology. A 40 KHz triangular waveform is used for frequency modulation. The spectrum spread ratio ranges from 0.125% to 1%. The peak power reduction is 16 dB.