An area-efficient Sinusoidal Pulse Width Modulation (SPWM) technique for Single Phase Matrix Converter (SPMC)

This paper presents an optimized sinusoidal pulse width modulation (SPWM) technique to control single phase matrix converter (SPMC) desirable for implementation in application specific integrated circuit (ASIC) or field programmable gate array (FPGA). The use of VHDL coding makes it adaptable for other design applications. The result provides an area-efficient architecture for effective design.