3D multichannels and stacked nanowires technologies for new design opportunities in nanoelectronics

Novel 3D stacked Gate-All-Around Multichannel CMOS architectures were developed to propose low leakage solutions and new design opportunities for sub-32nm nodes. Those architectures offer specific advantages compared to other planar or non planar CMOS devices. In particular, ultra-low I
OFF
(≪ 20pA/μm) and high ION (≫ 2.2mA/μm) were demonstrated. Moreover, those transistors do not suffer from discrete width layout constraints and can benefit from specific options like independent gate operation.