A nanoelectronic memory array design with improved performance

We present the design of a nanoelectronic memory array compatible with molecular switch (nanodevice) electrical characteristics. The proposed transmission gate based CMOL (hybrid CMOS / molecular) memory cell surmounts the operational difficulties facing the existing CMOL cell. The control circuitry with improved multiplexer design is introduced in this paper. HSPICE simulation shows that the required voltage levels can be achieved by using the proposed designs. Yield improvement through replacing the defective cell with a free cell can be achieved using a proposed algorithm. Moreover, the proposed memory cell has the same area as the existing CMOL inverter cells allowing easier implementation of both logic and memory circuits on the same chip.