Accelerated costas array enumeration using FPGAs

Costas array enumeration is an NP-complete problem with a highly parallelize-able solution. This paper examines the implementation of a solution to this problem on an FPGA platform and examines the elements of what makes the most efficient solution to this problem. This paper compares the performance of the hardware solution against the performance of the best known software solution and finds an approximate 40 times speedup from using hardware.