A novel topology in reversed nested miller compensation using dual-active capacitance

A novel three-stage amplifier topology for low-voltage and large capacitive load applications is proposed. This scheme is called the dual-active capacitance in reversed nested Miller compensation (DACRNMC). The frequency bandwidth of the DACRNMC amplifier is improved due to the usage of active compensation capacitors. The amplifier’s die area is reduced compared to the existing techniques in reversed nested Miller compensation (RNMC) scheme. Moreover, the presence of two left-half-plane zeros in the amplifier’s frequency response enhances the stability and hence improves the settling behavior of the amplifier. The circuit level simulation results of the proposed amplifier with a 0.18μm standard CMOS process achieve 20MHz unity gain bandwidth and 59 degree phase margin, while driving 500 pF load from a single 1.5 V power supply.