ANFIS implementation in FPGA for power amplifier linearization with digital predistortion

This paper presents a hardware implementation of an adaptive neuro-fuzzy inference system (ANFIS) in FPGA for power amplifier linearization with digital predistortion. The proposed approach approximates the inverse AM/AM and AM/PM characteristic of power amplifiers (PA) with two equivalent ANFIS of a first-order Sugeno FIS. The parameters of the ANFIS are obtained by an offline training process with neural networks algorithms. The linearity performance of the power amplifier is improved significantly with this technique. Experimental results show that about 5 to l0dB ACPR reduction could be achieved for 3.75MHz 16-QAM signals.