Optimized Scaling of Diode Array Design for 32nm Node Phase Change Memory

In this work, a compact physical model with diode access devices for PCM technology is developed and verified with extensive 2-D and 3-D device simulations. The choice of design parameters allows the operation of the diode access device to serve as a bipolar junction transistor (BJT) for the same physical structure. The PCM array design with these devices is optimized for the 90 nm, 45 nm and 32 nm technology nodes based on this compact model and further verified by 3-D numerical device simulation.