Design methodology of nested-Miller amplifiers for small capacitive loads

A novel methodology for designing the compensation network of nested-Miller amplifiers is proposed. Constructing the root contours of the nested structure, the method allows pole positioning to be carried out for small capacitive loads, as occurring in discrete-time applications. At the same time, it allows critical parameters such as the phase margin of the amplifier to be controlled by means of simple analytical expressions. Examples of its application to three-stage schemes are also presented.