A Radar Processor for Digitizing Beacon Video Signals

A design for a new radar beacon video processor has been evolved which contains a number of novel features. The design places less emphasis than do existing beacon processors on attempting to extract valid target replies from single radar sweeps and places relatively more emphasis on discrimination by comparison of successive sweeps. It employs a flexible sweep-to-sweep association logic and an efficient memory organization which takes full advantage of the available buffering capability.