Implementation of a 1oo2-RISC-architecture on FPGA for safety systems

Nowadays embedded systems are increasingly used in industrial applications. FPGAs are being used in complex roles in critical systems. The purpose of this paper is to present the basic ideas behind the building of safety related loo2 system on FPGA platform. Since systems with a single processor (loo1) provide cost effective inputs with a safety integrity rating of SIL
¹
2, a dual architecture (loo2) which provide high safety integrity to a rating of SIL 3, is presented. In the first part the complete design of a simple FPGA 16 bit RISC processor and a system on-chip design in synthesizable VHDL is presented and the safety demands for the loo2 architecture is given. In the second half of the paper, the implementation of the RISC architecture and of the loo2 architecture and some running applications are shown.