On the performance of double-gate MOSFET circuit applications

In this paper, we carry out a quantitative analysis of the performance of Double-Gate (DG) MOSFET circuit applications through various benchmark structures (NAND cell, ring oscillator and voltage controlled oscillator). Simulation results in double-gate fully depleted SOI/CMOS technology of the considered benchmarks under V
_dd
=1.2 V have shown that design with connected gates outperforms design with independent gate control with regard to speed and die area, while design with independent gate control is more appropriate for managing both dynamic and static power.