Region-based routing algorithm for Network-on-Chip architectures

In this paper, we present a novel approach for a region-based extension for a fully adaptive and fault-tolerant routing algorithm for Network-on-Chips (NoCs) called Force-Directed Wormhole Routing (FDWR) [T. Schonwald et al., 2007]. The proposed extension for the FDWR reduces the size of the routingtable of a switch and therefore the hardware costs. Despite the region-based extension the FDWR can be used for different NoC topologies like mesh, torus, and hypercube. The region-based extension is integrated into the Transaction Level Model (TLM) of the switch. We show how the proposed extension for the FDWR reduces the size of the routingtable. Simulation results depict that the traffic is distributed uniformly across the entire network despite the region-based extension. Furthermore, it is shown that in case of faulty switches the area around that switches is not overloaded and that the traffic is uniformly distributed across the entire network.