A prototype analog/mixed-signal fast fourier transform processor IC for OFDM receivers

A prototype FFT processor IC that reduces linearity requirements of Analog-to-Digital Converters in broadband Orthogonal-Frequency-Division-Multiplexing (OFDM) receivers is presented. The processor is based on a time-interleaving bank of sample-and-holds and a discretetime analog multiplication based FFT. The circuit design of the prototype IC is presented and measurement results from the 0.13μm test chip are shown. The FFT length-8 prototype successfully demodulates a complex OFDM signal at 1GSps while drawing 25milliwatts of power from a 1.2Volt supply and achieving an Error Vector Magnitude of 2.8%.