Improving Cost-Effectiveness Using a Micro-level Static Architecture for Stream Applications

A high-speed visual processing system often requires real-time algorithm adaptation because of environmental changes, user requests or multi-object processing standards. The reconfigurable platform based on a run-time reconfigurable FPGA can employ dynamic algorithm adaptation if the reconfiguration overhead stays within the application's temporal redundancy. We propose the system that ensembles an application specific micro-level static architecture on the reconfigurable device to provide the framework used by run-time reconfigurable procedures. The idea of the proposed system is employed under the visual process of an autonomous satellite docking system. The class of algorithms targeted for the system consists of stereo rectification, stereo extraction and object tracking. Due to the high speed requirements (e.g. 200 fps) of an extraterrestrial docking system to respond and grasp a moving target, algorithmic adaptation via dynamic reconfiguration should be conducted within the nominal response of a frame (i.e. 5 ms). We discuss how our system improves the cost-effectiveness for a given application.