Combined algorithmic and hardware acceleration for ultra-fast backprojection

We describe the first implementation and performance of a fast O(N
²
logN) hierarchical backprojection (FHBP) algorithm on a field programmable gate array (FPGA) platform. The resulting prototype tomographic backprojection system for 2D fan-beam geometry combines speedup through algorithmic improvements provided by the FHBP algorithm, with speedup of a specialized hardware platform. For data parameters typical in diagnostic CT, and using an off-the-shelf FPGA evaluation board, we report normalized reconstruction speeds of 160 frames a second, and relative speedup of 25x compared to conventional backprojection on the same hardware. These results demonstrate that the reduction in operation counts demonstrated previously for the FHBP algorithm can be translated to a comparable actual run time improvement in a massively parallel hardware implementation, while preserving stringent diagnostic image quality. The dramatic speedup and throughput achieved indicate the feasibility of systems based on this technology, which achieve real-time 3D reconstruction for state-of-the art diagnostic CT scanners at low power, small footprint, high-reliability, and affordable cost.