A low power SiGe GSM/DCS/WCDMA receiver

This paper deals with the design consideration and performance results for a low power SiGe receiver developed for the GSM/DCS/WCDMA multi-band cellular systems. The receiver IC chip comprises a current reuse low-noise amplifier, an active balun, a double balanced Gilbert mixer with improved IIP3 and interstage matching, and the related bias circuits. The receiver chip consumes 10mA at 3V to provide a power gain of higher than 30dB, a noise figure lower than 4.3dB, and an IIP3 higher than −21dBm, over 0.9–2GHz. With such a low current consumption, these circuits are ideal candidates for low-power multimode mobile terminal applications.