A quad 1–10Gb/s serial transceiver in 90nm CMOS

A quad 1-10 Gb/s serial transceiver in 90 nm digital CMOS technology is presented in this paper. A combination of transmitter pre-emphasis and receiver equalization is used. It can be used for different data rates and short-reach/long-reach applications with low overhead in area and power consumption. It is able to run across a 60-inch FR4 PCB trace with BER<10
^-12
at 3.125 Gb/s while consuming 70 mW/channel. At 10 Gb/s, it consumes 98 mW/channel to run across a 10-inch FR4 PCB trace and 90mW/channcl to run across a 4-inch FR4 PCB trace. Its die area is 1.6 mm
²
.