Implementation of Memory-Centric NoC for 81.6 GOPS object recognition processor

An 81.6 GOPS object recognition processor based on Memory-Centric NoC (MC-NoC) is implemented in a 0.18-μm CMOS technology. The MC-NoC facilitates data transactions among 10 SIMD Processing Elements (PEs) by exploiting 8 Visual Image Processing (VIP) memories. The 10 PEs implement special SIMD instructions to perform Gaussian filtering at 16 GOPS. The 8 VIP memories provide one cycle local maximum pixels search operation performing 65.6 GOPS. The chip dissipates 1.4W at 200 MHz operating frequency.