Implementation and Evaluation of Matrix-matrix Multiplication on FT64 Stream Processor

The FT64 stream processor is a 64-bit stream processor for scientific computing. It is necessary to research efficient implementation of scientific applications on FT64 to exploit the powerful ability. Matrix-matrix multiplication is an important kernel used in many scientific applications. In this paper, we develop two stream implementations of matrix-matrix multiplication on FT64, and optimize these versions by using stripmining technique. Our efforts aim at reducing memory access overhead and improving computational intensiveness. The experimental results show that the optimizing implementations on FT64 achieve high speedup over the corresponding fortran programs running on Itanium 2. It is certain that matrix-matrix multiplication can efficiently exploit the tremendous potential of FT64 processor through programming optimizations.