Design and VLSI implementation of a security ASIP

The ASIP, which features the high efficiency of ASIC coprocessor and the flexibility of general purpose processor, has and will have popular application in Information security domain. This paper presents a new design and VLSI architecture of security ASIP for RSA/ECC of cryptographic algorithms. By adopting the special instructions and computing unit, the proposed 32-bit RISC processor achieves the goal of high-speed and low-cost. Based on TSMC 0.25 mum standard CMOS technology, the core circuit of this security ASIP has only about 28k gates, and a max frequency of 150 MHz , under which only 200 ms is required when the security ASIP excutes a 1024-bit RSA.