An MBOK-UWB SoC transceiver in 0.181μm CMOS technology

A system-on-a-chip (SoC) pulse-based MBOK-UWB transceiver for high-speed wireless transmission is presented in this paper. The system achieves the data rate of 100 Mbps. The digital baseband implements RAKE receiving architecture, with M-ary bi-orthogonal keying (MB OK) spread spectrum modulation, low-density parity-check (LDPC) error-correct coding and Ethernet interface. The front-end circuits include low-power pulse generator, 3~5GHz wideband low-noise amplifier (LNA) and 1 Gsps 4 bit flash analog-to-digital converter (ADC). These modules of proposed SoC has been designed and fabricated in HJTC 0.18 mum 1P6M CMOS technology. The baseband had been designed and implemented in one Xilinx FPGA.