Optimal Design of Current Source Gate Driver for a Buck Voltage Regulator Based on a New Analytical Loss Model

The superior advantages of a new current-source resonant driver are verified thoroughly by the analytical analysis, simulation and experimental results. A new accurate analytical loss model of the power MOSFET driven by a current-source resonant gate driver is developed. Closed-formed analytical equations are derived to investigate the switching characteristics due to the parasitic inductance. The modeling and simulation results prove that compared to a voltage driver, a current-source resonant driver significantly reduces the propagation impact of the common source inductance during the switching transition at very high switching frequency, which leads to a significant reduction of the switching transition time and the switching loss. Based on the proposed loss model, a general method to optimize the new resonant driver is proposed and employed in the development of a 12V synchronous buck voltage regulator (VR) prototype at 1MHz switching frequency. The level-shift circuit and digital implementation of complex programmable logic device (CPLD) are also presented. The analytical modeling matches the simulation results and experimental results very well. Through the optimal design, a significant efficiency improvement is achieved. More importantly, compared to other state of the art VR approaches, the current-source driver is very promising from the standpoints of both performance and cost-effectiveness.