Fully Adaptive Fault-Tolerant Routing Algorithm for Network-on-Chip Architectures

In this paper, we present a novel fully adaptive and fault-tolerant routing algorithm for Network-on-Chips (NoCs) called Force-Directed Wormhole Routing (FDWR). The proposed routing algorithm is implemented in the switches of a TLM (Transaction Level Model) packet switching NoC using SystemC. Based on these switches, mesh, torus, and hypercube topologies for NoCs can be automatically generated. We show how the proposed algorithm distributes the traffic uniformly across the entire network to avoid overloaded links. Simulation results depict that the proposed routing algorithm is able to route packets even in the case of faulty links or switches in the NoC. Furthermore, it is shown that in the case of faulty switches the area around that switches is not overloaded and that the traffic is uniformly distributed across the entire network.