Generation and Measurement of Phase Jitter Using Phase-Lock Techniques

The phase-locked loop (PLL) is applied to generating and measuring large phase jitter that can be encountered in digital transmission systems. It is shown that jitter can be generated and measured by a PLL operated as a phase modulator and phase demodulator, respectively. Equations and examples are given for practical PLL designs to generate and measure jitter of a certain amplitude range and bandwidth. Practical considerations such as 1) phase detector range, 2) limited voltage-controlled oscillator sensitivity, 3) frequency tolerances, 4) pull-in time, and 5) calibration are included. PLL's designed in this way can be useful in evaluating digital transmission systems. Jitter measuring sets have been designed to measure jitter on the 1.5, 6.3, 45, and 274 Mbit/s signals used in the LD-4 digital cable system [1]. A jitter set for measuring jitter on 45 Mbit/s signals is described in this paper.