On-Chip Array of Thermoelectric Peltier Microcoolers

This article reports on the theoretical modelling, the finite element modelling (FEM) simulation, the fabrication process and preliminary results of the first on-chip thermoelectric microcooler array (64 pixels arranged in a 8times8 array), with each pixel independently controlled. This microcooler array uses co-evaporated V-VI compounds of Bi
₂
Te
₃
and Sb
₂
Te
₃
as thermoelectric layers, and can be fabricated using planar thin-film technology, lithography and wet etching on top of a silicon wafer, where the CMOS electronic circuits were previously made.