A New Self-Boosting Phenomenon by Soure/Drain Depletion Cut-off in NAND Flash Memory

A new self-boosting phenomenon is observed in 51nm NAND flash devices. The authors have modeled and named this observation ‘local self-boosting by source/drain depletion cut-off’, a result of low net N-type dopant in the source/drain region. As cell-to-cell design rules shrink into the 50-nm range, channel dopant is increased to reduce short-channel effects while implantation-related source/drain dopant scattering increases. These factors combine to reduce net source/drain dopant levels and junction depth. Simulation results show that the source/drain region is fully depleted when a programming voltage (Vpgm) of 20V is applied to unselected cells even at pass-voltage (Vpass) values as low as 1V. As the boosting efficiency by source/drain depletion cut-off is higher than that of conventional boosting methods, this phenomenon may be used to obtain sufficient Vpass window margin required for advanced multi-level cell (MLC) applications.