An Efficient DMA Controller for Multimedia Application in MPU Based SOC

In this paper, we propose a multimedia direct memory access controller (M-DMAC) architecture for multimedia application. By observing the characteristics of the reference blocks for inter-prediction operation, several improvements are made in the M-DMAC. To reduce the address calculation time, the M-DMAC provides 2D coordination setting interface and helps transform the X-Y coordination information configured by user into physical data address. Furthermore, single M-DMAC channel configuration could transfer up to four reference blocks at a time. Besides, the M-DMAC allows non-specific address alignment data to be transferred in word size, which highly increases the bus bandwidth utilization. Experimental results show that our proposed M-DMAC performs around 2~4 times faster than traditional DMAC which supports 2D transfer.