Behavioral Modeling of Switched Capacitor Integrators with Application to ΣΔ Modulators

This paper presents two accurate behavioral models for switched-capacitor integrators with application to the modeling of low-power high-speed ΣΔ modulators. The first model is based on the integrator transient response and includes the effects of the amplifier transconductance, and output conductance. The second model is based on a symbolic node admittance matrix representation of the system. VHDL-AMS and MATLAB Simulink were used to implement the first and second model, respectively. Simulations for a GSM/WCDMA second-order multibit ΣΔ modulators model were performed, exhibiting less than 5.0% of error in the signal-to-noise plus distortion ratio (SNDR) when compared to experimental data.