A 100-dB CMRR CMOS Operational Amplifier With Single-Supply Capability

A CMOS operational amplifier that has a common-mode rejection ratio (CMRR), a power-supply rejection ratio (PSRR), and gain above 100 dB for each of these parameters is described. This is achieved by combining a high output-impedance tail current source with a stable drain-source voltage of the input transistors. The common-mode input signal range includes the negative rail. This is obtained by controlling the bulk bias of the input and cascoding transistors. The amplifier consists of two gain stages connected via cascoded current mirrors. The gain is improved by using gain boost in the current mirrors, and by the suppression of impact ionization current in the output stage