A Distributed and Shared Register File for a Multiprocessor-on-Chip to Support Real-Time Applications

The authors have developed 116 times 32-bit 1-write-port, 2-read-port, 4-read/write-port register file to be shared by five processors in a multiprocessor-on-a-chip, supporting conditional operands in both read and write operations. This register file provides the underlying SoC with an inter-processor transparent communication layer in which each processor shares a distributed (register) address space (comprised of 32 registers) with eight other processors to reach a tightly-coupled array of processors with high-performance inter-processor communication facilitating real-time applications