Band Edge n-MOSFETs with High-k/Metal Gate Stacks Scaled to EOT=0.9nm with Excellent Carrier Mobility and High Temperature Stability

We demonstrate, for the first time, a HfLaSiON/metal gate stack that concurrently achieves the following: low threshold voltage (V
_T
=0.33V), low equivalent oxide thickness (EOT=0.91nm) (T
_inv
=1.3nm) and 83% SiO
₂
mobility. Key enablers of this result are 1) La doped HfSiON for n-FET V
_T
tuning 2) HfO
₂
:SiO
₂
alloy ratio with 10% SiO
₂
suppressing crystallization up to 1070degC, 3) interlayer SiO
₂
(IL) to reduced bias temperature instability (BTI) and 4) plasma nitridation (N*)/post nitridation anneal (PNA) sequence for EOT scaling. This work advances high-k/band edge metal gate (MG) efforts by showing scalability of HfLaSiON to EOT=0.91nm without mobility or BTI tradeoff, while matching the V
_T
of a SiO
₂
/n-PolySi control