High-Performance 15-V Novel LDMOS Transistor Architecture in a 0.25- $\mu\hbox{m}$ BiCMOS Process for RF-Power Applications

The optimization of the small and large signal performances of a radio frequency (RF)-LDMOS is presented via the achievement of a novel LDMOS architecture. Specific process steps are introduced into a 0.25-mum BiCMOS technology and precisely described to realize a fully salicided gate RF-LDMOS architecture. Significant improvement is obtained on the small-signal - f
_T
and F
_max
- and power performances while maintaining good dc characteristics