Real Time FFT Processor Implementation

This paper describes the implementation of a 64 point FFT processor in VHDL. The implemented architecture (E. Cetin, et al., 1997) is well suited for real-time spectrum analysis in instrumentation and measurement applications. It uses a single butterfly processor instead of a column of butterfly processors. The butterfly consists of one multiplier and two adders. The paper describes the VHDL implementation of various units of this processor