A 5.8mW Fully Integrated 1.5GHz Synthesizer in 0.13-μm CMOS

This paper describes the design of a low power 1.5GHz fully integrated PLL based frequency synthesizer. The synthesizer includes a conventional tri-state phase frequency detector, a fully differential charge pump, a 2
^nd
-order on-chip loop filter, a voltage-controlled ring oscillator and a programmable divider. The synthesizer is implemented in a 0.13μm CMOS process, consumes 5.8mW of power at a supply voltage of 1.2V, has a phase noise of -82dBc/Hz at 1MHz offset, and has reference spurs lower than -47dBc. The entire synthesizer is designed using current mode logic and occupies an area of 0.34mm
²
.