A 1V 450μ W Quadrature Bandpass ΔΣ Modulator for the IEEE 802.15.4 Standard

This paper describes the design and implementation of a 2
^nd
-order continuous-time quadrature bandpass ΔΣ modulator for wireless sensor networks (WSN) using the IEEE 802.15.4 standard. The design is focused on the constraints of low power consumption, low supply voltage and low complexity imposed by WSN. The availability of I and Q signals in the low-IF receiver enables a quadrature architecture which allows combining signal filtering, image rejection and quantization noise reduction. A continuous-time G
_m
-C implementation further combines the anti-alias function within the ADC and allows achieving the 1V operation. The quadrature ΔΣ modulator is integrated in a 0.18μm standard digital process. It is clocked at 72MHz and the center frequency is set at 3.75MHz with a bandwidth of 3MHz. The maximum measured signal-to-noise ratio is 36dB and the power consumption is only 450μW under 1V.