Ultra-Fast Measurements of VTH Instability in SiC MOSFETs due to Positive and Negative Constant Bias Stress

One of the most important issues that limits the performance and reliability of SiC power MOSFETs is the threshold voltage instability under normal operation conditions. This phenomenon has been recently studied using dc sweep measurements. In this work, we studied the threshold voltage instability using fast I-V measurements. The results show that under positive bias, V
_TH
shifts to more positive values, while it shifts to more negative values under negative bias. Fast I-V measurements reveal the full extent of the V
_TH
instability, underestimated by the dc measurements. Furthermore, fast measurements allow the separation of negative and positive bias stress effects. A physical model involving fast transient charge trapping and de-trapping at and near the SiC/SiO
₂
interface is proposed