A VLSI Implementation of Minutiae Extraction for Secure Fingerprint Authentication

To heighten the biometrics security level, the biometrics feature extraction and verification need to be performed within smart cards, not in external card readers. However, the smart card chip has very limited processing capability, and typical fingerprint feature extraction and verification algorithms may not be executed on a state-of-the-art smart card. Therefore, this paper presents a system-on-chip (SoC) implementation of the fingerprint feature extraction algorithm which can be integrated into smart cards. To implement the ridge-following algorithm onto the resource-constrained SoCs, the algorithm has been modified to increase the efficiency of the hardware. Each functional block of the algorithm has been implemented in hardware or in software by considering its computational complexity, cost and utilization of the hardware, and efficiency of the entire system. The proposed system operated in 50MHz, and 20~50 minutiae could be extracted from typical 248timestimes292 fingerprint images in real time with our small area implementation (97K gates). Our current implementation developed as an IP for SoCs targeted for ARM CPU and AMBA bus can also be extended for many other smart card configurations