Distributed circuit simulation using waveform relaxation in a slotted-ring architecture

A distributed event-driven waveform relaxation (WR) algorithm is presented, which has been mapped on to a slotted-ring parallel architecture, to accelerate the circuit simulation problem at the electrical level. The simulator was adopted from a portable simulator developed at the University of Illinois. A message-passing paradigm was build around it to simulate circuits in a distributed manner. A speedup factor between 1.4 to 3.4 were obtained, using 4 processing elements (PEs).<
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