A 0.1-25.5-GHz Differential Cascaded-Distributed Amplifier in 0.18- μm CMOS Technology

A differential distributed amplifier employs a loss-compensation L section to increase the bandwidth of the interstage by a factor of 3.5. To demonstrate the proposed circuit, a cascaded distributed amplifier with five stages is presented. It has been fabricated in a 0.18um CMOS process and achieves a gain of better than 15 dB and a pass bandwidth of 100 MHz to 25.5 GHz while consuming 171 mW from a 1.9-V supply