A Simple Electrical RLC Crosstalk Model for Interconnects on Silicon

Crosstalk is generally recognized as a major problem in IC design. This paper presents the high-frequency characterization and modeling of a crosstalk-probe structure using a simple circuital RLC model. We demonstrate that a simple RLC circuit can accurately model all parasitic effects in interconnects on silicon. The structures were fabricated in AMIS 0.35u C035M-A technology, using the two upper metal layers and SiO2 as the inter-level dielectric, and measured using a vector network analyzer in the 40 MHz to 50 GHz range.