HALSIM-a very fast SPARC-V9 behavioral model

This paper describes several implementation techniques used in HAL's 500 KIPS SPARC V9 behavioral model. Beyond presenting the details of our processor model, we describe several areas of innovation: architectural state-vector capture for injection into a gate-level hardware model, using an EDC polynomial-based signature scheme to verify a hardware design; obtaining accurate kernel and user-mode instruction trace data.<
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