MTD132-a new subnanosecond multi-hit CMOS time-to-digital converter

A novel 8-channel, 16-hit, subnanosecond resolution, 16-bit dynamic range time-to-digital VLSI CMOS circuit is described. It can operate in either common start or common stop mode and records either leading, trailing, or both input edges. Double-pulse resolution is 15 ns. Readout is lessened. and input signal levels are ECL (emitter coupled logic) compatible while control and output levels are CMOS compatible. The measured performance of prototype devices is presented. A CAMAC and a FASTBUS TDC (time-to-digital converter) board using this chip are under development.<
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