Integrating a full custom microprocessor in a user defined ASIC array as a fully diffused core

A MC68000 microprocessor has been embedded in a gate array device as a fully diffused core, allowing ASIC designers to combine up to 60 K gates of user-defined logic, verified within the Verilog simulation environment. The MC68000 can be implemented on other array sizes utilizing the same flow. For each new array the layout flow is repeated to generate a new base wafer that includes the MC68000. This allows migration to arrays with larger gate availability and various package offerings.<
>