Reconfiguration strategies in VLSI processor arrays

Reconfiguration strategies in VLSI processor arrays have been advocated in the recent literature as a means of achieving higher production yield and higher reliability. The authors present reconfiguration techniques for rectangular arrays that are generalizations of the Diogenes approach proposed earlier by A.L. Rosenberg (1983). These techniques overcome many of the limitations of the earlier Diogenes schemes. Two schemes for reconfiguring rectangular arrays are presented. The first scheme for reconfiguring an N*N rectangular array uses r additional rows and c additional columns. It guarantees reconfiguration as long there are at most c columns that have more than r faulty processors. The second scheme uses spare processors. It guarantees reconfiguration as long as there are enough spare processors, and in any window of N processors in a particular linearization there are at most k faulty processors, where k is a parameter of the design.<
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