BiCMOS SRAM with array-integrated sense devices

A 128-word by 44-b wide SRAM (static random-access memory) embedded array has been designed in a BiCMOS process that contains 0.45- mu m FETs and 18-GHz bipolar transistors. The design integrates the sense-amp function into the array, and BiCMOS performance levels are maintained without utilizing the DC power of traditional BiCMOS sense-amplifier and level-shift circuits. The sense-amp function is realized through a unique combination of bipolar devices and FET storage cells distributed along a bit line. Each bipolar device acts as an address/data-controlled current switch that may or may not discharge a bit line. The discharge occurs very quickly, generating a full signal level capable of driving CMOS logic.<
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