A new statistical approach for fault-tolerant VLSI systems

A novel approach to the statistics of fault-tolerant VLSI systems is presented by compounding binomial distributions with a beta distribution. This technique was discovered in the analysis of fault-tolerant dynamic random-access memory (DRAM) chips. Manufacturing data supporting this method are shown and the application of the approach to standard fault-tolerance schemes is described. Special forms of these statistics for computer calculations are also discussed and examples are given.<
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