A BiCMOS tristate buffer for high-speed microprocessor VLSI

This paper presents a high speed BiCMOS tristate buffer with a single bipolar device pull-up structure for driving a bus with a large capacitive load. With the new pull-structure, the BiCMOS tristate buffer, which is suitable for microprocessor VLSI, has an improvement in delay time of 30% compared with the standard BiCMOS tristate buffer.<
>