An environment for the development of microcode for pipelined architectures

An environment for the development of microcode for parallel and pipelined machines is presented. The system is based on a set of low-level transformations called pipelined percolation scheduling (PPS). The PPS transformations are integrated into a system which does automatic code compaction, but also allows interactive control of the parallelization process, while the system deals with the burdensome details of architecture, correctness-preservation and synchronization. The atomicity, generality and modularity of PPS permit the integration of new, user-defined higher-level transformations on top of the core transformations, to achieve the best performance for the target architecture.<
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